If I have a correct understanding about Velbus, communication between software and Velbus modules or inter-module communication is address based. This should imply that each module is responsible for processing its own commands. After processing such a command, the packet is removed from the bus by the responsible module.
But what happens with commands for non-existing addresses? I suppose these commands are buffered on the bus, causing a bus overflow resulting in a bus reset. This cleans up everything leaving the bus in a clean state.
Let’s say one would perform a bus scan, sending the module type request to all possible addresses on the bus in a sequential way. Existing modules respond to this request. Non-existing module obviously won’t. Is there a way to know when the last module type request (possibly for a non-existing module) has been removed from the bus? This would be necessary to detect bus scan completion. In other words, does the bus send a message when a packet has been processed (due to module processing or due to bus removal)?
Are packets processed in the same order as they were created on the bus?
That is correct. Each module needs a unique address in the 1-255 range. Some addresses are reserved though. They will only respond to valid commands sent to their address.
[quote=“kdw001”]After processing such a command, the packet is removed from the bus by the responsible module.
But what happens with commands for non-existing addresses? I suppose these commands are buffered on the bus, causing a bus overflow resulting in a bus reset. This cleans up everything leaving the bus in a clean state.[/quote]
All modules receive the command, they don’t remove it from the bus. They only choose to respond or not respond to them.
That method of scanning is used by our VelbusLink software. There is no way to know when the scan is complete except than to wait for a realistic period of time and to assume everyone would have answered in that timeframe since not all addresses will reply.
FYI a possible work-around:
Given the fact that all packets are processed in the same order as they were created on the bus, you could “simulate” bus scan completion by addressing one module as the first allowed address and one module as the last allowed address. Waiting for the last (maximum) address to respond could (more or less) indicate completion of the scan process.
It is definitely not fail proof, but it might do the trick for most of them who want to have some kind of indication about scan completion.
